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<title>Autonomous peripheral operation</title>

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Autonomous peripheral operation

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</style><div role="note" class="hatnote navigation-not-searchable">Not to be confused with <a href="Autonomous_decentralized_system" title="Autonomous decentralized system">Autonomous decentralized system</a> or <a href="Decentralized_autonomous_organization" title="Decentralized autonomous organization">Decentralized autonomous organization</a>.</div>

In computing, autonomous peripheral operation is a hardware feature found in some <a href="Microcontroller" title="Microcontroller">microcontroller</a> architectures to off-load certain tasks into embedded autonomous peripherals in order to minimize <a href="Latency_(engineering)" title="Latency (engineering)">latencies</a> and improve <a href="Throughput" class="mw-redirect" title="Throughput">throughput</a> in <a href="Hard_real-time" class="mw-redirect" title="Hard real-time">hard real-time</a> applications as well as to save energy in <a href="Ultra-low-power" class="mw-redirect" title="Ultra-low-power">ultra-low-power</a> designs.

<div class="mw-heading mw-heading2"><h2 id="Overview">Overview</h2></div>

Forms of autonomous peripherals in microcontrollers were first introduced in the 1990s. Allowing embedded <a href="Peripheral" title="Peripheral">peripherals</a> to work independently of the <a href="CPU" class="mw-redirect" title="CPU">CPU</a> and even interact with each other in certain pre-configurable ways off-loads event-driven communication into the peripherals to help improve the <a href="Real-time_computing" title="Real-time computing">real-time</a> performance due to lower <a href="Latency_(engineering)" title="Latency (engineering)">latency</a> and allows for potentially higher data <a href="Throughput" class="mw-redirect" title="Throughput">throughput</a> due to the added parallelism. Since 2009, the scheme has been improved in newer implementations to continue functioning in <a href="Sleep_mode" title="Sleep mode">sleep modes</a> as well, thereby allowing the CPU (and other unaffected peripheral blocks) to remain dormant for longer periods of time in order to save energy. This is partially driven by the emerging <a href="Internet_of_things" title="Internet of things">IoT</a> market.<a href="#cite_note-R26-1">[1]</a>

Conceptually, autonomous peripheral operation can be seen as a generalization of and mixture between <a href="Direct_memory_access" title="Direct memory access">direct memory access</a> (DMA) and <a href="Hardware_interrupt" class="mw-redirect" title="Hardware interrupt">hardware interrupts</a>. Peripherals that issue event signals are called event generators or producers whereas target peripherals are called event users or consumers. In some implementations, peripherals can be configured to pre-process the incoming data and perform various peripheral-specific functions like comparing, windowing, filtering or averaging in hardware without having to pass the data through the CPU for processing.

<div class="mw-heading mw-heading2"><h2 id="Implementations">Implementations</h2></div>

Known implementations include:

<ul><li>Peripheral Event Controller (PEC) in <a href="Siemens" title="Siemens">Siemens</a>/<a href="Infineon" class="mw-redirect" title="Infineon">Infineon</a> <a href="C166" class="mw-redirect" title="C166">C166</a> and <a href="C167" class="mw-redirect" title="C167">C167</a> 16-bit microcontrollers since 1990<a href="#cite_note-Wolf_1994-2">[2]</a><a href="#cite_note-Siemens_2000_C167CR-3">[3]</a><a href="#cite_note-Infineon_2004-4">[4]</a><a href="#cite_note-Irber_2018-5">[5]</a></li>

<li>Intelligent autonomous peripherals (Capture compare unit CCU6) in Infineon <a href="Infineon_XC800" class="mw-redirect" title="Infineon XC800">XC800</a> series of <a href="8051" class="mw-redirect" title="8051">8051</a>-compatible 8-bit microcontrollers since 2005<a href="#cite_note-R24-6">[6]</a></li>

<li>Event System (EVSYS) in <a href="Atmel" title="Atmel">Atmel</a> <a href="Atmel_AVR" class="mw-redirect" title="Atmel AVR">AVR</a> <a href="XMEGA" class="mw-redirect" title="XMEGA">XMEGA</a> 8-bit microcontrollers since 2008<a href="#cite_note-R12-7">[7]</a><a href="#cite_note-R3-8">[8]</a></li>

<li>Peripheral Event System (PES) with SleepWalking<a href="#cite_note-R1-9">[9]</a> in Atmel (now <a href="Microchip_Technology" title="Microchip Technology">Microchip Technology</a>) <a href="AVR32" title="AVR32">AVR32</a> <a href="AT32UC3L" class="mw-redirect" title="AT32UC3L">AT32UC3L</a> 32-bit microcontrollers since 2009<a href="#cite_note-R10-10">[10]</a><a href="#cite_note-R2-11">[11]</a><a href="#cite_note-R17-12">[12]</a></li>

<li>Peripheral Reflex System (PRS) in <a href="Energy_Micro" title="Energy Micro">Energy Micro</a> (now <a href="Silicon_Labs" title="Silicon Labs">Silicon Labs</a>) Gecko <a href="EFM32" title="EFM32">EFM32</a> 32-bit ARM-based microcontrollers since 2009<a href="#cite_note-R11-13">[13]</a><a href="#cite_note-R4-14">[14]</a><a href="#cite_note-R17-12">[12]</a></li>

<li><a href="IXYS" title="IXYS">IXYS</a>/<a href="Zilog" title="Zilog">Zilog</a> ZNEO Z16FMC 16-bit microcontrollers since 2011<a href="#cite_note-R21-15">[15]</a><a href="#cite_note-R22-16">[16]</a></li>

<li>Event Link Controller (ELC) in <a href="Renesas" class="mw-redirect" title="Renesas">Renesas</a> microcontrollers since 2011</li>

<li>Programmable Peripheral Interconnect (PPI) in <a href="Nordic_Semiconductor" title="Nordic Semiconductor">Nordic</a> nRF 32-bit ARM-based microcontrollers since about 2011<a href="#cite_note-R5-17">[17]</a></li>

<li>Autonomous peripherals in Infineon <a href="Infineon_XMC" title="Infineon XMC">XMC</a> 32-bit microcontrollers since 2012<a href="#cite_note-R25-18">[18]</a></li>

<li>Data Transfer Manager (DTM) in <a href="Silicon_Labs" title="Silicon Labs">Silicon Labs</a> <a href="Precision32" class="mw-redirect" title="Precision32">Precision32</a> <a href="SiM3L1" class="mw-redirect" title="SiM3L1">SiM3L1</a> 32-bit <a href="ARM_Cortex-M3" class="mw-redirect" title="ARM Cortex-M3">ARM Cortex-M3</a> microcontrollers since 2012<a href="#cite_note-R15-19">[19]</a><a href="#cite_note-R17-12">[12]</a><a href="#cite_note-R19-20">[20]</a></li>

<li>Peripheral Event System (PES) with SleepWalking in Atmel (now Microchip Technology) <a href="SAM4L" class="mw-redirect" title="SAM4L">SAM4L</a> 32-bit <a href="ARM_Cortex-M4" class="mw-redirect" title="ARM Cortex-M4">ARM Cortex-M4</a> microcontrollers since 2012<a href="#cite_note-R20-21">[21]</a></li>

<li>Power-Smart Peripherals in <a href="Freescale" class="mw-redirect" title="Freescale">Freescale</a> (now <a href="NXP" class="mw-redirect" title="NXP">NXP</a>) <a href="Kinetis_L" class="mw-redirect" title="Kinetis L">Kinetis L</a> 32-bit <a href="ARM_Cortex-M0%2B" class="mw-redirect" title="ARM Cortex-M0+">ARM Cortex-M0+</a> microcontrollers since 2012<a href="#cite_note-R23-22">[22]</a></li>

<li>Event System (EVSYS) with SleepWalking<a href="#cite_note-R1-9">[9]</a> in Atmel (now Microchip Technology) <a href="SAMD_(processor)" class="mw-redirect" title="SAMD (processor)">SAMD</a>, <a href="SAML_(processor)" class="mw-redirect" title="SAML (processor)">SAML</a> and SAMC 32-bit ARM Cortex-M0+ microcontrollers since 2013<a href="#cite_note-R6-23">[23]</a><a href="#cite_note-R18-24">[24]</a></li>

<li>Core Independent Peripherals (CIP) in Microchip <a href="PIC16F" class="mw-redirect" title="PIC16F">PIC16F</a><a href="#cite_note-R7-25">[25]</a> and <a href="PIC18F" class="mw-redirect" title="PIC18F">PIC18F</a><a href="#cite_note-R8-26">[26]</a> as well as Microchip AVR <a href="ATtiny" class="mw-redirect" title="ATtiny">ATtiny</a> 8-bit microcontrollers since 2015<a href="#cite_note-R9-27">[27]</a><a href="#cite_note-R13-28">[28]</a><a href="#cite_note-R14-29">[29]</a></li>

<li>Peripherals Interconnect Matrix in <a href="STMicroelectronics" title="STMicroelectronics">STMicroelectronics</a>' <a href="STM32" title="STM32">STM32</a> 32-bit ARM-based microcontrollers since 2015<a href="#cite_note-R16-30">[30]</a></li>

<li>Low-Power Background Autonomous Mode (LPBAM) in STMicroelectronics' <a href="STM32U5" class="mw-redirect" title="STM32U5">STM32U5</a> 32-bit ARM-based microcontrollers since 2021<a href="#cite_note-ST_2021-31">[31]</a></li></ul>

<ul><li><a href="Channel_I/O" title="Channel I/O">Channel I/O</a></li>

<li><a href="Peripheral_DMA_controller" title="Peripheral DMA controller">Peripheral DMA controller</a> (PDC)</li>

<li><a href="Clock_gating" title="Clock gating">Clock gating</a>, <a href="Autonomous_peripheral_clock_gating" class="mw-redirect" title="Autonomous peripheral clock gating">autonomous peripheral clock gating</a></li>

<li><a href="Power_gating" title="Power gating">Power gating</a></li>

<li><a href="CPU_power_dissipation" class="mw-redirect" title="CPU power dissipation">CPU power dissipation</a></li>

<li><a href="Low-power_electronics" title="Low-power electronics">Low-power electronics</a></li>

<li><a href="Event-driven_architecture" title="Event-driven architecture">Event-driven architecture</a></li>

<li><a href="Event-driven_programming" title="Event-driven programming">Event-driven programming</a></li>

<li><a href="Always_On%2C_Always_Connected" class="mw-redirect" title="Always On, Always Connected">Always On, Always Connected</a> (AOAC)</li>

<li><a href="Energy-Efficient_Ethernet" title="Energy-Efficient Ethernet">Energy-Efficient Ethernet</a> (EEE)</li>

<li><a href="TCP_offload_engine" title="TCP offload engine">TCP offload engine</a> (TOE)</li>

<li><a href="Coprocessor" title="Coprocessor">Coprocessor</a></li></ul>

<div class="mw-heading mw-heading2"><h2 id="References">References</h2></div>

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</style><cite id="CITEREFPitcher2014" class="citation web cs1">Pitcher, Graham (2014-01-28). <a rel="nofollow" class="external text" href="http://www.newelectronics.co.uk/electronics-technology/the-internet-of-things-is-pushing-microcontroller-developers-to-move-in-unexpected-directions/59112/">"Things worthy of consideration - The Internet of Things is pushing microcontroller developers to move in unexpected directions"</a>. <a href="New_Electronics" title="New Electronics">New Electronics</a>. pp. 22–23. <a rel="nofollow" class="external text" href="https://web.archive.org/web/20180510135037/http://www.newelectronics.co.uk/electronics-technology/the-internet-of-things-is-pushing-microcontroller-developers-to-move-in-unexpected-directions/59112/">Archived</a> from the original on 2018-05-10. Retrieved 2018-05-10.</cite> <a rel="nofollow" class="external autonumber" href="http://www.newelectronics.co.uk/article-images/59112/P22-23.pdf">[1]</a>

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<li id="cite_note-Wolf_1994-2"><a href="#cite_ref-Wolf_1994_2-0">^</a> <cite id="CITEREFWolf1994" class="citation magazine cs1">Wolf, Axel (March 1994). <a rel="nofollow" class="external text" href="http://ep.etc.tuiasi.ro/site/DIVERSE/placi/CAN/34/pdf/can1.pdf">"Connecting the C166 architecture to CAN (I)"</a> (PDF). Components. Applications Microcontrollers. Vol. XXIX, no. 4. <a href="Siemens_Aktiengesellschaft" class="mw-redirect" title="Siemens Aktiengesellschaft">Siemens Aktiengesellschaft</a>. pp. 42–44. <a rel="nofollow" class="external text" href="https://web.archive.org/web/20211202014605/http://ep.etc.tuiasi.ro/site/DIVERSE/placi/CAN/34/pdf/can1.pdf">Archived</a> (PDF) from the original on 2021-12-02. Retrieved 2021-12-02.</cite> (3 pages) (NB. Mentions the term "autonomous peripherals" in conjunction with the Siemens/Infineon <a href="SAB_80C166" class="mw-redirect" title="SAB 80C166">SAB 80C166</a> in 1994 already. Part II of the article: <a rel="nofollow" class="external autonumber" href="https://web.archive.org/web/20211202020242/http://datasheet.datasheetarchive.com/originals/library/Datasheet-055/DSA0030475.pdf">[2]</a>)

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